WebMay 21, 2024 · Ecenur Üstün. I am a Ph.D. candidate in Electrical and Computer Engineering at Cornell University. My research focuses on FPGA design of arithmetic intensive applications and agile hardware development. I develop design automation tools for rapid end-to-end FPGA design closure with machine learning and formal approaches. WebOct 8, 2024 · To support a different application or application size, we need to run the time-consuming accelerator prototype/manufacture flow. Thanks to recent advances [hu2024graphlily, song2024sextans] in accelerator design, Sextans [song2024sextans] and GraphLily [hu2024graphlily] support an arbitrary SpMM with only one hardware …
[2109.11081] Sextans: A Streaming Accelerator for General …
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Pyxis: An Open-Source Performance Dataset of Sparse Accelerators
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